1. Field of the Invention
Embodiments of the present invention generally relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to a process for depositing low dielectric constant films for integrated circuits.
2. Description of the Related Art
Integrated circuit geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices on a chip doubles every two years. Today's fabrication facilities are routinely producing devices having 90 nm and even 65 nm feature sizes, and tomorrow's facilities soon will be producing devices having even smaller feature sizes.
The continued reduction in device geometries has generated a demand for films having lower dielectric constant (k) values because the capacitive coupling between adjacent metal lines must be reduced to further reduce the size of devices on integrated circuits. In particular, insulators having low dielectric constants, less than about 4.0, are desirable. Examples of insulators having low dielectric constants include spin-on glass, fluorine-doped silicon glass (FSG), carbon-doped oxide, and polytetrafluoroethylene (PTFE), which are all commercially available.
More recently, low dielectric constant organosilicon films having k values less than about 3.0 and even less than about 2.5 have been developed. One method that has been used to develop low dielectric constant organosilicon films has been to deposit the films from a gas mixture comprising an organosilicon compound and a compound comprising thermally labile species or volatile groups and then post-treat the deposited films to remove the thermally labile species or volatile groups, such as organic groups, from the deposited films. The removal of the thermally labile species or volatile groups from the deposited films creates nanometer-sized voids in the films, which lowers the dielectric constant of the films, as air has a dielectric constant of approximately 1.
While low dielectric constant organosilicon films that have desirable low dielectric constants have been developed as described above, some of these low dielectric constant films have exhibited less than desirable mechanical properties, such as poor mechanical strength, which renders the films susceptible to damage during subsequent semiconductor processing steps. Semiconductor processing steps which can damage the low dielectric constant films include plasma-based etching processes that are used to pattern the low dielectric constant films. Ashing processes to remove photoresists or bottom anti-reflective coatings (BARC) from the dielectric films and wet etch processes can also damage the films.
Thus, there remains a need for a process for making low dielectric constant films that have improved mechanical properties and resistance to damage from subsequent substrate processing steps.